During semiconductor fabrication it is common to use silicon dioxide (SiO.sub.2) as an insulator between metal layers due to its superior dielectric properties. It is typical to form a titanium/aluminum/titanium (Ti/Al/Ti) stack for use as a metal1 layer. Over this metal1 stack a thick film of plasma SiO.sub.2 is deposited. Usually before a metal2 layer is deposited on the dielectric, topography variations existing on the dielectric are smoothed out by planarization techniques such as chemo-mechanical polishing (CMP).
Unfortunately, the polishing technique by its very nature induces a lot of stress at the interface between the metal1 layer and the dielectric layer. Extensive peeling of the dielectric is observed if the adhesion between the metal and dielectric is poor, which is highly undesirable.
The present invention addresses the poor adhesion that can exist between a metal layer and a dielectric layer in the several embodiments described hereinafter.